1. Priority Claim
This application claims the benefit of priority from Korean Patent Application No. 10-2007-0067868, filed on Jul. 6, 2007, which is hereby incorporated by reference in its entirety.
2. Technical Field
The present invention relates to a liquid crystal display device and a method of driving the same.
3. Related Art
Some display devices use cathode-ray tubes (CRTs). Other display devices may be flat panel displays, such as liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission displays (FED), and electro-luminescence displays (ELDs). Some of these flat panel displays may be driven by an active matrix driving method in which a plurality of pixels arranged in a matrix configuration are driven using a plurality of thin film transistors. Among these active matrix type flat panel displays, liquid crystal display (LCD) devices and electroluminescent display (ELD) devices may exhibits a higher resolution, and increased ability to display colors and moving images as compared to some of the other flat panel display devices.
An LCD device may include two substrates that are spaced apart and face each other with a layer of liquid crystal molecules interposed between the two substrates. The two substrates may include electrodes that face each other. A voltage applied between the electrodes may induce an electric field across the layer of liquid crystal molecules. The alignment of the liquid crystal molecules may be changed based on an intensity of the induced electric field, thereby changing the light transmissivity of the LCD device. Thus, the LCD device may display images by varying the intensity of the electric field across the layer of liquid crystal molecules.
FIG. 1 is a block diagram of an LCD device according to the related art. FIG. 2 is a circuit diagram of a liquid crystal panel of FIG. 1, and FIG. 2 is a waveform view illustrating gate voltages output from a gate driver of FIG. 1.
Referring to FIG. 1, the LCD device includes a liquid crystal panel 3 and a driving circuit. The driving circuit 26 may include gate and data drivers 2 and 1.
The liquid crystal panel 3 includes a plurality of gate lines GL1 to GLm along a first direction and a plurality of data lines DL1 to DLn along a second direction.
The plurality of gate lines GL1 to GLm and the plurality of data lines DL1 to DLn cross each other to define a plurality of pixels. Each pixel includes a thin film transistor TFT, a liquid crystal capacitor LC, and a storage capacitor Cst. The liquid crystal capacitor LC includes a pixel electrode connected to the thin film transistor TFT, a common electrode, and a liquid crystal layer between the pixel and common electrodes.
The gate driver 2 sequentially output gate voltages to the gate lines GL1 to GLm. Referring to FIG. 2, for the gate lines GLm-2 to GLm, gate voltages are sequentially output from the gate driver 2. The gate lines GL1 to GLm are sequentially selected, and the thin film transistors TFT connected to the selected gate line GL1 to GLm are turned on. The data driver 2 is supplied with the data signals and outputs data voltages to the data lines DL1 to DLn in accordance that each gate line GL1 to GLm is selected.
Even though not shown in the drawing, the driving circuit includes a timing controller, a gamma reference voltage generator, a power supply and an interface. The interface is supplied with the data signals and control signals such as a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a data clock signal. The data signals and control signals are supplied from an external system, such as a computer system. The timing controller is supplied with the control signals from the interface and generates control signals to control the gate and data drivers 2 and 1. The timing controller processes the data signals and supplies those to the data driver 1. The gate driver 2 is supplied with the control signals from the timing controller to sequentially output the gate voltages to the gate lines GL1 to GLm. The data driver 1 is supplied with the data signals and the control signals from the timing controller. The gamma reference voltage generator generates gamma reference voltages which are supplied to the data driver 1. The power supply supplies voltages that operate the components of the LCD device.
The related art LCD device may be categorized into a normally white mode LCD device and a normally black mode LCD device. The normally white mode LCD device is operated in a manner that white is displayed when an off-level data voltage is applied, and the normally black mode LCD device is operated in a manner that black is displayed when an off-level data voltage is applied.
FIG. 3 is a view illustrating a graph of a time and voltage and a graph of a time and a transmittance in a normally white mode LCD device according to the related art.
Referring to FIG. 3, when a second data voltage Va to display black is applied from a first data voltage (=0V), a response time of the LCD device is ta. When the first data voltage to display white is applied from the second data voltage Va, a response time is tb. The response time tb for white is more than the response time ta for black. White and black are highest and lowest gray levels, respectively, of the LCD device.
Various factors such as a data voltage, parasitic capacitances, a driving method, a liquid crystal material and the like have influence on the response time. A main factor having influence on the liquid crystal response time ta for black is a data voltage out of the various factors. In the meantime, the response time tb for white is influenced more by other factors than the data voltage. This is one of reasons that the response time tb for white is more than the response time ta for black, or response times for gray levels between white and black.
The related art LCD device may be operated in an over-driving method to decrease a response time. The over-driving method is to use a principle that a response time becomes faster as a data voltage having a level higher or lower than a level of an original data voltage required to display a certain gray level is applied first for an over-driving time out of a data-applying time. The data-applying time is a time when a data voltage is applied from the data driver (1 of FIG. 1) through the corresponding data line (DL1 to DLm of FIG. 1) to the corresponding pixel. When a gray level of the present frame is higher than that of the previous frame, a data voltage, which has a level higher than that a level of an original data voltage required to display the gray level of the present frame, is applied first for an over-driving time. When a gray level of the present frame is lower than that of the previous frame, a data voltage, which has a level lower than a level of an original data voltage required to display the gray level of the present frame, is applied first for an over-driving time. Accordingly, liquid crystal molecules rotate faster, thus a transmittance required for the gray level of the present is reached faster and a response time becomes faster. After the over-driving time, the original data voltage is applied for the rest time out of a data-applying time. After the data-applying time, the original data voltage is stored in the corresponding pixel and the transmittance is maintained in the present frame.
FIG. 4 is a view illustrating an over-driving method of the related art normally white mode LCD device.
Referring to FIG. 4, a third data voltage Vb having a level higher than a level of a second data voltage Va as an original data voltage to display black is applied first for an over-driving time. Because of the over-driving method, a response time is reduced to a time tc less than the response time (ta of FIG. 3). However, because a first data voltage to display white is 0V, there exists no voltage having a level than 0V. Accordingly, the over-driving method can not be applied to display white and a response time tb is not reduced.